NUP4301MR6T1 Datasheet, ON Semiconductor

http://onsemi.com PIN CONFIGURATION AND SCHEMATIC
* Low Capacitance (1.5 pf Maximum Between I/O Lines)
* Single Package Integration Design
* Provides ESD Pro.

1 2 64d TSOP-6 CASE 318F PLASTIC 64 = Specific Device Code d = Date Code ORDERING INFORMATION Device NUP4301MR6T1 P.